Abstract
In the past years, EUV lithography scanner systems have entered high-volume manufacturing for state-of-the-art integrated circuits (IC), with critical dimensions down to 10 nm. This technology uses 13.5-nm EUV radiation, which is transmitted through a near-vacuum H2 background gas, imaging the pattern of a reticle onto a wafer. The energetic EUV photons excite the background gas into a low-density H2 plasma. The resulting plasma will locally change the near-vacuum into a conducting medium and can charge floating surfaces and particles, also away from the direct EUV beam. We will discuss the interaction between EUV-induced plasma and electrostatics, by modeling and experiments. We show that the EUV-induced plasma can trigger discharges well below the classical Paschen limit. Furthermore, we demonstrate the charging effect of the EUV plasma on both particles and surfaces. Uncontrolled, this can lead to unacceptably high voltages on the reticle backside and the generation and transport of particles. We demonstrate a special unloading sequence to use the EUV-induced plasma to actively solve the charging and defectivity challenges.
Highlights
The ongoing technological evolution in integrated circuits (IC’s) is driven by an exponential growth in demand for computing power and data transport and is expected to accelerate further in coming years with the advent of artificial intelligence running partly on high-performance centralized servers and on local and mobile edge-computing devices
An alternative solution is dynamic charge compensation during the unload sequence by creating a supply of free-charge carriers; this will reduce the charge on the reticle as the voltage builds up and will maintain acceptably low voltage levels throughout the unloading sequence to prevent any risk of discharge
PIC simulations of the extreme ultraviolet (EUV)-induced plasma in the region below the reticle show that micron-sized particles get a short positive charge, flip to a negative charge, after which they reach an equilibrium between electron and ion currents, as shown in Fig. 24; this process will be reset for every new pulse
Summary
The ongoing technological evolution in integrated circuits (IC’s) is driven by an exponential growth in demand for computing power and data transport and is expected to accelerate further in coming years with the advent of artificial intelligence running partly on high-performance centralized servers and on local and mobile edge-computing devices. Driven by Moore’s law,[1] named after Intel cofounder Gordon Moore, the critical dimensions of IC’s have shrunk by a factor of 2 every 1.5 to 2 years; nowadays, the critical dimensions of the most advanced devices are in order of 10 nm This has been enabled by advances in all processing steps, but mainly by continuous advances in photolithography, by decreasing the (UV) wavelength and increasing the numerical aperture of the photolithographic tools ( known as scanners, see Fig. 1), and introducing resolution enhancements such as polarization[2,3] and immersion.[4] Recently, the introduction of extreme ultraviolet (EUV) scanners into high-volume manufacturing[5] has ensured that Moore’s law can continue for the coming years.[6]. These aspects will be described in more detail and design consideration will be discussed
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