Abstract
Using plan-view transmission electron microscopy (PVTEM), we have identified stacking faults (SFs) and planar defects in 4H-SiC PiN diodes subjected to electrical bias. Our observations suggest that not all planar defects seen in the PiN diodes are SFs. By performing diffraction-contrast imaging experiments using TEM, we can distinguish SFs from other planar defects. In addition, high-resolution TEM (HRTEM) imaging and analytical TEM have revealed that some planar defects consist of a 3-nm-wide SiC amorphous layer. Many of these planar defects are orientated parallel to {1 $$1\bar 100$$ 00} planes, whereas others are roughly parallel to the (0001) plane. The appearance of these planar defects suggests that they are grain boundaries.
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