Pipelining the unconstrained three-port wave filter adaptor at the bit level

Abstract

In this paper a fully systolic, bit level, three-port unconstrained adaptor, which constitutes the main nontrivial building block of ladder wave digital filters, is generated. The one-dimensional binary convolution is used as the underlying algorithm for the implementation of a multiplication. The Isb-first input data organization approach is adopted and thecanonical mapping methodology is used to fully systolize the unconstrained parallel three-port adaptor at the bit level with piplining period a=1. The technique is based on a transformation of the adaptor's signal-flow graph, so that unidirectional data flow takes place. A ring-systolic scheme is proposed for implementing communications among adaptors.