Abstract

A memristor is an electrical two-terminal passive device that exhibits a pinched hysteresis loop that always passes through the origin in the voltage-current plane. We found a system that also exhibits pinched hysteresis loop, which, consequently following the trend in the literature, can be called memristors; however, their dynamics do not match the equation of memristor that is widely spread and used in the literature. For this reason, in this work, we proposed the name of hysteristor of order n. It is a passive system with zero-crossing hysteresis loop in the V-I plane but not necessarily governed by the conventional equations of memristors. The system is proposed to provide a comprehensive circuit taxonomy. The concept of a hysteristor encapsulates and generalizes the idea of memristive systems. To validate the theory, we present theoretical analysis and representative simulations of a novel hysteristor of order 1.

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