Abstract
In this paper, a power/ground (P/G) pin optimization method using genetic algorithm (GA) is proposed for large-scale high-pin-count ball grid array (BGA) packages. Two objective functions are derived for signal integrity and power integrity, respectively. A general optimization flow is presented, where the basic concepts of GA optimization are introduced and some important considerations for package design are demonstrated. A customized GA flow and two accelerating strategies are developed to improve the efficiency of the optimization procedure. Using GA optimization, the P/G pin assignment of a 40 × 40 BGA package with blocks of core, inputs/outputs and differential pairs can be generated in a few tens of minutes automatically.
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