Pilot Assessment of Fault-Tolerant PID Flight Controller for Elevator Efficiency Reduction via Hardware-In-the-Loop Simulations

Abstract

This note presents the pilot assessment of a Fault-Tolerant Control (FTC) law for elevator efficiency reduction via Hardware-In-the-Loop Simulations (HILS) with a research airplane MuPAL-α. The FTC is supposed to be a PID controller from the viewpoint of the practicality and applicability viz., conventional Stability/Control Augmentation System (S/CAS) structure is adopted. The PID-FTC is designed with the consideration of onboard actuator uncertainties as well as the possible loss of efficiency (from 0% loss up to 80% loss) in the framework of H∞ control with hinfstruct command implemented in Matlab®. In HILS, the pilot is required to have steady climb and descent under the condition that the elevator efficiency is gradually reduced in a software level. HILS results indicate that the designed PID-FTC works well when the elevator efficiency decreases even under wind gust conditions.