Abstract
Mechanical deformation changes the silicon material’s electrical resistivity (Smith, Phys Rev 94(1):42–49, 1954). This is an important property of the material. The effect known as ‘piezoresistive’ has found many applications over time. In micro-electro-mechanical systems (MEMS), for example, it has enabled the integration of pressure sensors with complementary metal-oxide semiconductor (CMOS) circuits that translate the stress into voltage signals. The piezoresistive effect has been also observed and studied in the metal-oxide-silicon field effect transistor (MOSFET), the principal component of a CMOS integrated circuit (IC). In transistors the strain affects the mobility of the carriers and as a result the drain current and the speed of the transistor. Although scaling tends to achieve its limitations, the need to further increase the MOSFET performance by having more power and speed remains. Based on mobility enhancement due to the stress/strain applied to the MOSFET channel, the ‘strained Si’ technique has been chosen as a new degree of freedom to further improve MOSFET performance and to defeat scaling limitations. In this chapter we discuss aspects related to the piezoresistive effect in bulk Si and its modifications in MOSFET Si inversion layer. We analyse the strain effects on Si electronic band structure and its transport properties. Piezoresistive coefficient values from literature for bulk Si and MOSFETs under uniaxial strain are presented and compared.
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