Physical Understanding of Gate-Depletion Phenomena in Poly-Si/HfSiON Stacks Based on $C$–$V$ Differentiation Analysis

Abstract

We propose sub-1-A-resolution analysis of gate surface layer In scaled-Tinv (capacitance equivalent thickness at substrate inversion) gate stacks by differentiating their C-V curves. By introducing the universal derivative-of-capacitance curve, gate stacks with different equivalent oxide thickness of gate insulator and substrate-impurity concentration JVSub can be analyzed in one and the same plot. By applying this analysis technique to p+ poly-Si/HfSiON stack, it is found that gate depletion increases due to both lower poly impurity concentration Npoly and high pinning charge density Nox inside the dielectric. Ultrathin SiN cap insertion onto HfSiON recovers the degradation in Npoly and Nox leading to suppression of gate depletion and flatband voltage shift.