Abstract

Transistor gate stack systems consisting of atomic layer deposited HfO2 with polycrystalline silicon or TiN gate electrodes have been characterized by analytical electron microscopy to elucidate underlying physical contributions to electrical performance differences. High-angle annular dark-field scanning transmission electron microscopy was used to determine film and interface thickness dimensions and chemical analysis depth profiling was obtained from electron energy loss spectra and energy dispersive x-ray spectra. The high-k gate dielectric film system is shown to be influenced by the choice of electrode material with the formation of an HfO2-poly-Si interface that increases the dielectric equivalent oxide thickness and may affect electron trapping characteristics.

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