Abstract

Phosphorus (P)-doped polycrystalline-silicon gate/HfO2 or HfO2–Al2O3/p-type Si (100) metal–oxide–semiconductor capacitors were fabricated using either a POCl3 diffusion or an ion implantation technique to investigate the relationship between P penetration and the electrical properties of the high-k gate dielectric stacks. The HfO2–Al2O3 bilayer showed higher P diffusion blocking properties as a result of the 4.1-nm-thick amorphous interface layer including Al2O3 (or Al-silicate). The P ion-implanted sample with the HfO2–Al2O3 bilayer sample had the smallest leakage current density of −8.8×10−10 A/cm2 at −1 V, which was due to the lower P penetration, and the higher trap depth of approximately 1.3±0.02 eV compared to 0.9±0.02 eV of the sample with only HfO2. However, the P doping by POCl3 diffusion was too excessive and only very leaky devices were produced.

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