Abstract
This work demonstrates an efficient and simple approach for applying high-order extended-stencil FDTD algorithms near planar perfect electric conductors (PEC) boundaries while minimizing spurious reflections off the interface between the high-order grid and the mandated special compact cells around PEC boundaries. This proposed approach eliminates the need for cumbersome subgridding implementations and provides a superior alternative in minimizing spurious reflections without any added modeling complexity or computing costs. The high-order algorithm used in this work is the recently proposed three-dimensional FV24 algorithm and the proposed approach can be easily extended to the standard Fang high-order FDTD algorithm which represents a special case of the highly phasecoherent FV24 algorithm.
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