Abstract
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net (HCHPN), to model real-delay switching activity for power estimation is proposed. A logic circuit is converted into an HCHPN and simulated as a Petri net to obtain the switching activity estimate and thus the power values. The method is accurate and is significantly faster than other simulation methods. The HCHPN yields an average error of 4.9% with respect to Hspice for ISCAS '85 benchmark circuits. The per-pattern simulation time is about 46 times less than PowerMill.
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