Abstract

Downscaling the front-side texture from the micron-scale to the nanoscale introduces new possibilities for light management in solar cells and is considered as an opportunity for further reducing g/Wp without compromising on power conversion efficiency. We report on the fabrication and characterisation of periodic inverse nanopyramid textured silicon heterojunction devices on a range of substrate thicknesses for identifying the constraints that could limit the performance of nanostructured cells. The devices are benchmarked against the industry standard random pyramid texture. While the open-circuit voltage is comparable and demonstrates that effective surface passivation can be achieved with inverse nanopyramid textured devices, the device efficiencies are hampered by considerable reflection losses in the 400–800 nm wavelength range. We deduce that these reflection losses arise due to constraints that can be both processing-related or intrinsic to the nanotexture and amount to a short-circuit current density (JSC) loss of 2.2 mA/cm2 on 125 μm thick substrates. Experimental constraints include the imperfect nanopatterning on rough surfaces, the non-conformal deposition of sputtered ITO antireflection coating (ARC) on nanopyramids and the non-ideal area filling fraction of the pattern. The intrinsic limitation comes from the diffraction effect of periodic nanopyramids, whose pitch determines the targeted wavelength for reflectance minima. Moreover, parasitic absorption in ARC significantly lowers the JSC of our cells for both texturing schemes. Therefore, despite being able to effectively passivate, the identified processing-related constraints regarding nanotextured cells will need to be overcome for attaining performance that is equivalent with the random pyramid textured cells.

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