Performance Study of FPGA Based AND-Inverter Ring Oscillator PUFs

Abstract

Hardware oriented security attacks, IP theft, and information reliability have become serious issues in modern day world. Numerous techniques have been developed for protecting hardware systems from malicious attacks. Ring Oscillator Physical Unclonable Function (ROPUF) is one of the favored choices for hardware-oriented security. ROPUFs are implemented in microelectronic circuits including Field Programmable Gate Arrays (FPGAs) to generate unique secret keys that are unclonable on any other device. The strength and performance of Physical Unclonable Functions (PUFs) are measured through parameters like reliability, uniqueness, uniformity, randomness, and bit-aliasing. In this paper, we analyze the performance of an AND-Inverter based ROPUF which shows performance improvement over previous designs. Three, five, and seven stage AND-Inverter ROPUFs are implemented for a comparative study of their performance metrics. It is found that the 3-stage AND-Inverter ROPUF has better uniqueness (47.5%), and ideal bit-aliasing (50%). The 7-stage AND-Inverter ROPUF has the best uniformity (50.07%) and ideal bit aliasing (50%). However, the AND-Inverter based ROPUFs perform poorly in terms of reliability.