Performance Optimization of Application Algorithms for Heterogeneous Multi-Processor System-on-Chips

Abstract

PDF HTML阅读 XML下载 导出引用 引用提醒 异构多处理器SoC 的应用算法性能优化方法 DOI: 10.3724/SP.J.1001.2011.03847 作者: 作者单位: 作者简介: 通讯作者: 中图分类号: 基金项目: 国家自然科学基金(90207019, 90707003) Performance Optimization of Application Algorithms for Heterogeneous Multi-Processor System-on-Chips Author: Affiliation: Fund Project: 摘要 | 图/表 | 访问统计 | 参考文献 | 相似文献 | 引证文献 | 资源附件 | 文章评论 摘要:在嵌入式多媒体处理领域中,多处理器片上系统(multi-processor system-on-chip,简称MPSoC)的应用越广泛.多媒体处理MPSoC 通常采用“主处理器核+多个异构协处理器核”的主流体系结构.该结构兼顾了MPSoC 系统的通用性与灵活性、性能与功耗,但也向MPSoC 的性能优化方法提出了更高的要求.针对异构MPSoC 上的体应用算法,提出了一种MPSoC 多媒体处理性能优化方法.该方法经过应用特征分析、循环仿射划分、应用向MPSoC 各处理器核的映射,实现了优化的数据局部性与多级并行性,从而提高了异构MPSoC 上多媒体应用算法能.实验结果表明,该方法对于多媒体应用算法在异构MPSoC 上的处理性能优化方面取得了明显效果. Abstract:MPSoCs (multi-processor system-on-chips) are comprehensively applied in the embedded multimedia processing field. Multimedia MPSoCs often adopt the “host processor+multiple heterogeneous synergistic processor” architecture, which makes the trade-off between universality and flexibility. MPSoCs also take into consideration both performance and power-consumption, but challenges the method of performance optimization of System-on-Chip applications. This paper proposes an approach that improves the performance of application algorithms running on heterogeneous MPSoCs. The approach includes three stages: Application feature analysis, affine partitioning of kernel loops, and “application-architecture” mapping. It optimizes the multi-level parallelism and data locality of application algorithms to improve MPSoC performance. Experimental results show that the proposed approach can greatly improve the multimedia processing performance on heterogeneous MPSoCs. 参考文献 相似文献 引证文献