Performance of SOI MOSFETs with Ultra-Thin Body and Buried-Oxide

Abstract

The electrical characteristics in ultra-thin (8 nm) SOI-MOSFETs with 10 nm buried oxide thickness were studied. Threshold voltage was effectively controlled for both of N-channel and P-channel SOI-MOSFETs even in the short devices (45 nm). No degradation of the mobility due to the use of thin buried oxide could be detected. Through appropriate back-gate biasing, the performance of ultra-thin SOI-MOSFETs can be improved dramatically. In P-channel SOI-MOSFETs, the hole mobility measured in volume conduction regime is higher than when only one interface (Si/high-K or Si/SiO2) is activated. This gain makes the hole mobility comparable with the universal mobility law and is promising for performance enhancement in CMOS circuits.