Performance of a high-frame-rate CCD imager

Abstract

Back-illuminated, 16-port 512 X 512 and 32-port 1024 X 1024 charge coupled device (CCD) imagers have been fabricated. The measured performance of the 512 X 512 pixel chip is described, including data on quantum efficiency, dynamic range, dark current, frame rates, uniformity, contrast transfer function, and on-chip correlated double- sampling (CDS) amplifier noise. We have previously reported on these designs. The CCD arrays are designed with a unique combination of parameters optimized for applications requiring high resolution combined with high frame rates and wide dynamic range. The imaging registers achieve 100% optical fill factor and high quantum efficiency through the use of substrate thinning and back-side illumination. The high frame-rate readout is obtained by the use of a dual storage register and multiple floating-diffusion output ports which reduce the 512 X 512 array readout frequency to 15 MHz for 800 frame per second operation. On- chip CDS amplifiers are included in each output port to reduce the readout noise and simplify off-chip analog signal processing. Both designs include a buried anti-blooming drain structure and electro static discharge (ESD) protection.