Abstract
This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic logic circuits based on nanoelectromechanical (NEM) switches. It is shown that the contact resistance and the electro-mechanical switching behavior of the NEM switches dictate the performance of such circuits. Simplified analytical expressions are derived based on a 1-dimensional reduced order model (ROM) of the switch; the results given by this simplified model are compared to classical CMOS-based, and sub-threshold CMOS-based adiabatic logic circuits. NEMS-based circuits and CMOS-based circuits show different optimum operating conditions, depending on the device parameters and circuit operating frequency.
Highlights
Adiabatic logic circuits were introduced as a possible means to achieve ultra-low power circuits by taking advantage of the adiabatic charging principle [1,2,3,4]
From what is already introduced in the previous section, it is clear that the two most influential features of NEMS-based adiabatic circuits are: the contact resistance and the dynamic response of the switch
The dynamic response of the switch and the way it affects power consumption are related to the mode of actuation of the switch, where a quasi-static actuation, i.e., “mechanically adiabatic”, is theoretically possible if a long enough ramp-up time is used. This form of operation of NEMS-switches is less poised to be a candidate for practical adiabatic circuits, due to the low commutation speeds required for that mode of operation
Summary
Adiabatic logic circuits were introduced as a possible means to achieve ultra-low power circuits by taking advantage of the adiabatic charging principle [1,2,3,4] (the adiabatic charging principle states that if the voltage in a circuit changes slower than the electric time constant of the circuit, resistive losses are reduced). NEM switches offer the advantage of zero leakage current and zero static power dissipation, which is an appealing property for low power low performance circuits. These switches require high operating voltages and suffer from low switching speeds when compared to MOSFETs, see for example [5] and [7] for a comprehensive review. These factors constitute serious obstacles to replace CMOS circuits by NEM relays for low power solution
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