Performance improvement of SOI Tunnel-FET using pure boron and Ge pocket layer

Abstract

This article highlights the results of a source pocket-engineered heterojunction pure-boron SOI Tunnel-FET (SP-PB-TFET) for low-power applications. To achieve improved performance, a novel pure-boron silicon TFET structure is considered with Silicon–Germanium source, Germanium pocket. Based on experimental data, the on-state current of a SiGe source TFET increases with increasing Ge content in SiGe. Nevertheless, the off-state leakage current increases with the Ge content of SiGe. To mitigate the problem somewhat, a Ge-pocket could be incorporated into the source near the tunneling junction. The final results provide a high current ratio (Ion/Ioff) of 1011 and a steep subthreshold swing (SS) of 18 mV/Decade at a very low supply voltage of 0.7 V. Moreover, SP-PB-TFET is suitable for high-frequency appliances due to its high cut-off frequency. This work also addresses the impact of temperature analysis and interfacial traps on device performance. The proposed SP-PB-TFET provides excellent DC and analog performance, making it suitable for low-power, high-frequency applications.