Performance Improvement by Sampling Position Approach in Dual Loop Digital ACM Controlled DC-DC Boost Converter

Abstract

In DC-DC boost converter mostly discontinuous voltage ripple is associated with Equivalent Series Resistance (ESR) of the output side capacitor. This voltage ripple makes the design of digital controllers challenging in deciding the appropriate sampling position in one switching period. The necessity of Right Half Plane Zero (RHPZ) elimination, which impacts the stability is managed by shifting the sampling position to OFF-time duration. This is mostly analyzed in the frequency domain. The proposed work provides the time-domain analysis in consideration of ESR impacting the RHPZ. A dual loop Digital Average Current Mode (DACM) controller which has two sampling position freedom is considered in this brief. The ESR value of the output capacitor for extracting the benefits of RHPZ elimination is proposed with help of the discrete-time modeling technique. An analytical discussion about the influence of RHPZ elimination with time-domain characteristics such as, voltage deviation, peak-to-peak inductor current oscillations, and efficiency is presented. Finally, two 60W boost converters prototype with different output capacitor (C) and its ESR <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$(r_{C})$ </tex-math></inline-formula> values are developed to validate the proposed analysis.