Performance Evaluation of FPGA-Controlled DSTATCOM for Load Compensation

Abstract

This paper presents an implementation and performance analysis of a three-phase distribution static compensator (DSTATCOM) for various compensations in a system with static and dynamic loads. Under static loading condition, DSTATCOM is used for reactive power compensation, harmonic elimination and load balancing. During dynamic loading condition, induction machine is considered as a dynamic load by operating it as motor/generator and the dynamic reactive power support capability of DSTATCOM is explored. Synchronous reference frame theory is utilized for reference signal generation and hysteresis pulse width modulation switching is employed for firing pulse generation, which are implemented in field-programmable gate array (FPGA). All the tasks in FPGA are realized as independent modules to build the system with the capability to reconfigure the hardware for any other application with similar requirements. The proposed FPGA implementation utilizes reduced amount of reconfigurable resources and works without a dedicated personal computer. The experimental results prove that the implemented control technique makes the supply current sinusoidal and the supply power factor close to unity.