Performance evaluation of a third-order LADF sigma–delta ( Σ– Δ) modulator via FPGA implementation

Abstract

Over the last few decades, sigma–delta ( Σ– Δ) modulators have been widely used in various signal processing applications. In these applications, for improved signal-to-noise ratio performances, higher order modulators are used. In this paper, we investigate the performance of a third-order Look Ahead Decision Feedback (LADF) Σ– Δ modulator. It is shown that the LADF Σ– Δ modulator, which has not been widely reported in the literature, is efficient and offers attractive features for hardware implementation. These features are investigated via the use of a system level design for Field Programmable Gate Array prototyping of the LADF modulator.