Performance Estimation of Embedded Software with Instruction Cache Modeling

Abstract

The execution time of a program can vary significantly from one run to the next on the same system. Even given a known program and a known system, the actual execution time depends on the input data values and the initial state of the system. In many cases it is essential to know the worst case execution time (WCET) for a hardware/software (HW/SW) system. In hard real-time systems, the programmer must guarantee that the WCET satisfies the timing deadlines. Many real-time operating systems rely on this for process scheduling. In embedded system designs, the WCET of the software is often required for deciding how hardware/software partitioning is done. The actual WCET of a program cannot be determined unless one simulates all possible combinations of input data values and initial system states. This is clearly impractical due to the large number of simulations required. As a result, one can only obtain an estimate on the actual WCET by performing a static analysis of the program. For it to be useful, the estimated WCET must be tight and conservative such that it bounds the actual WCET without introducing undue pessimism. WCET analysis can be divided into two components: program path analysis, which determines the sequence of instructions to be executed in the worst-case scenario, and microarchitecture modeling, which models the underlying hardware systems and computes the WCET of a known sequence of instructions. Both components are important in determining tight estimated WCETs.