Performance enhancement of WS2 transistors via double annealing

Abstract

Herein, we report the double annealing strategy to improve the device performance of WS2 transistors fabricated using multilayer WS2 flakes on SiO2/p++-Si substrates. In the double annealing approach, the annealing is performed twice, both before and after electrode formation. The statistical analysis of 50 WS2 transistors indicated that, compared to the conventional single annealing, the double annealing increased the average field-effect mobility and reduced the average contact resistance. The enhanced device performance could be attributed to the improved interface quality between WS2 and the electrodes, owing to the removal of organic residues and desorption of surface adsorbents during the first annealing before the electrode formation. These results demonstrate the effectiveness of double annealing in enhancing the device performance of WS2 transistors, suggesting the important role of process optimization in fabricating WS2 transistors and other transition metal dichalcogenide devices.