Abstract
The paper proposes novel solutions to improve the signal and thermal integrity of crossbar arrays of Resistive Random-Access Memories, that are among the most promising technologies for the 3D monolithic integration. These structures suffer from electrothermal issues, due to the heat generated by the power dissipation during the write process. This paper explores novel solutions based on new architectures and materials, for managing the issues related to the voltage drop along the interconnects and to thermal crosstalk between memory cells. The analyzed memristor is the 1 Diode - 1 Resistor memory. The two architectural solutions are given by a reverse architecture and a complementary resistive switching one. Compared to conventional architectures, both of them are also reducing the number of layers where the bias is applied. The electrothermal performance of these new structures is compared to that of the reference one, for a case-study given by a 4 × 4 × 4 array. To this end, a full-3D numerical Multiphysics model is implemented and successfully compared against other models in literature. The possibility of changing the interconnect materials is also analyzed. The results of this performance analysis clearly show the benefits of moving to these novel architectures, together with the choice of new materials.
Highlights
High demands for big data storage, high-performance computing, and deep learning are driving intense research efforts on next-generation memories [1]-[4]
Resistive Random-Access Memories (RRAMs) electrical resistivity state can switch between Low Resistance State (LRS) and High Resistance State (HRS)
The main scope of this paper is to propose two novel architectures, namely a reverse and a complementary resistive switching, for realizing large arrays of RRAMs, comparing their performance in terms of signal and thermal integrity, to the conventional 1D-1R crossbar structure
Summary
High demands for big data storage, high-performance computing, and deep learning are driving intense research efforts on next-generation memories [1]-[4]. The main scope of this paper is to propose two novel architectures, namely a reverse and a complementary resistive switching, for realizing large arrays of RRAMs, comparing their performance in terms of signal and thermal integrity, to the conventional 1D-1R crossbar structure. The second one (Fig.1d) is based on an elementary cell without the diode (Fig.1e): two memory cells are integrated into the array in such a way to realize two antiserial resistive elements (Complementary Resistive Switching, CRS) sharing a thin common electrode [8]-[9]. This structure will be hereafter denoted as CRS architecture.
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