Performance enhancement of core-shell JLFET by gate/dielectric engineering

Abstract

ABSTRACTIn this paper, enhancement of volume depletion is studied on P-type double gate junctionless Field Effect Transistor (P-DGJLFET) by Gate work function and Gate dielectric engineering. The formation of parasitic BJT action in junctionless device along with DIBL effect is curtailed by integrating Rectangular Core-Shell (RCS) architecture with varying core doping along with different gate oxides and electrodes, respectively. After validating our simulations with the experimental results on Junctionless P-type FET, we demonstrated that RCS based P-DGJLFET with high K dielectric and aluminium as gate electrode exhibits superior ON/OFF ratio, Lower DIBL, better ON current, good OFF current and desired threshold voltage at channel length 5 nm. An exceptional ON/OFF current ratio (ION/IOFF) of 1010 is achieved when core is made thicker than shell. The DIBL is reduced by 62.5% when thin core along with SiO2 is replaced by thick core and HfO2. Also, the stringent requirement of lower work function in Junctionless P-type is relaxed using RCS architecture. The performance of RCS with polysilicon as gate electrode is better than conventional DGJLFET with aluminium as gate electrode. A comprehensive comparison on performances between different technology boosters applied on double gate JLT in the literature and proposed device is also presented.