Abstract
It is shown that, depending on the circuit families used, the extrinsic base encroachment results in distinct effects on the operation and performance of the circuits. The design considerations and scaling implications, using a basic inverter as an example for a saturating circuit, are discussed. It is shown that while the extrinsic base encroachment causes increases in the delay time, fall time, and risetime of a basic bipolar junction transistor inverter, the saturation time of the inverter actually decreases, since the transistor is driven less deeply into saturation due to reduced collector current (reduced current gain). The decrease in the saturation time, however, is accompanied by the reduced noise margin, especially for narrow emitter stripes. Cases for nonsaturating circuits are discussed in Part II using nonthreshold logic as an example. >
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