Performance Comparative Analysis of Artificial Intelligence Chip Technology

Abstract

The rapid development of artificial intelligence (AI) demands the enhancement of domain-specific hardware specifically designed for AI applications. Although the depth of hardware acceleration methods has been dug deeply to tickle this problem, a comprehensive review is not enough to get a detailed knowledge of these cutting-edge techniques. This paper proposes the direction and challenges of different chip designs in the present. In general, the AI chip refers to a chip that has been specially designed for and used in the field of AI algorithms. The frameworks and characteristics of the hardware accelerators based on conventional von Neumann architecture are described as the basic methods. In addition, the amount of data has shown explosive growth, where the traditional computing architecture cannot support the massive transition requirement of the data between computing processor and memory. Inference efficiency becomes the major design consideration for modern machine learning accelerators. The throughput and energy consumption were mainly determined by the efficiency of performing multiply-and-accumulate (MAC) during inference, and new insight to address this problem was provided by a process-in-memory (PIM) method. Finally, inspired by the physiological principle, a pathway of brain-inspired computing becomes an energy-efficient approach to AI computing workloads. The development of various brain-inspired chips based on non-volatile memory is reviewed in this paper, focusing on computing density, energy efficiency, computing accuracy, on-chip learning capability, and co-design principles, from the device to the algorithm level.