Abstract

Miniaturization and portable devices have reshaped the electronic device landscape, emphasizing the importance of high performance while maintaining energy efficiency to ensure long battery life. FinFET and Tunnel-FET technologies have emerged as attractive alternatives to overcome the limitations of supply voltage scaling for ultra-low power applications. This work compares the performance of 10 nm FinFET- and TFET-based digital circuits from basic logic gates up to an 8k gates low-power microprocessor. When compared with their FinFET-based counterparts, the TFET-based logic gates have lower leakage power when operated below 300 mV, show higher input capacitance, and exhibit a reduced propagation delay under different fan-in and fan-out conditions. Our comparative study was extended to the synthesis of an MSP-430 microprocessor through standard cell libraries built particularly for this work. It is demonstrated that the TFET-based synthesized circuits operating at ultra-low voltages achieve a higher performance in terms of speed at the cost of increased power consumption. When the speed requirements are relaxed, the TFET-based designs are the most energy-efficient alternative. It is concluded that the TFET is an optimal solution for ultra-low voltage design.

Highlights

  • Standard cell libraries containing Tunnel Field-Effect Transistor (TFET)- and FinFET-based logic cells are characterized to achieve the synthesis of an MSP-430 microprocessor, as well as to compare the performance of the implementations using these devices

  • For the sake of accuracy, considering that the TFET devices we refer to in this assessment were characterized at room-temperature [21], we limited our study to 25 °C for supply voltages ranging from 200 to 500 mV

  • This work presents a comparison in terms of speed and energy consumption of TFETand FinFET-based circuits, including an MSP-430 benchmark intended for ultra-low-voltage operation

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Summary

Introduction

The emergence of portable applications has ushered in the development of several compact electronics, including wireless sensor networks, Internet of Things devices, biomedical technologies, and wearable equipment. Most of these electronic devices of reduced size target energy efficiency since reducing the power consumption directly translates into a longer battery lifetime [1,2,3,4,5,6,7,8]. Voltage down-scaling is an effective method to achieve a minimum energy operation for relaxed-performance applications [9,10,11,12]. The manufacturing process of the bulk CMOS technology has run into limitations, such as poor scalability, high leakage current, and short channel effects, despite the fact that the down-scaling of this technology has been the common solution to maintain an acceptable circuit performance [13,14]

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