Abstract
Multiply and accumulate (MAC) units form the basic building blocks in several key areas such as digital signal processing, deep learning, medical imaging and multimedia applications. In Deep Neural Network (DNN) or deep learning, convolution accounts for more than 90% of overall computation, dominating the runtime and energy consumption of the system. These convolution operations are primarily performed using MACs. This paper analyzes the delay and power performances of single-precision Floating-Point MACs using four different multiplication algorithms. The multiplication algorithms used for the performance analysis in this paper are Wallace Tree Reduction, Modified Booth Encoding (MBE), Combinational Array, and Add and Shift. The performances of the various implemented MAC units are analyzed using TSMC 45nm and 90nm technology nodes.
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