Abstract
For the first time, the authors have investigated the analysis of the room-temperature operation of single-electron transistor (SET) for periodic symmetric functions (PSFs). They demonstrate that in SETs due to the Pauli exclusion principle the distance between current peaks against bias voltage in coulomb oscillations will be asymmetric. Also, because the separated energy levels have unequal tunnel-barrier resistance, different tunnelling current rates are obtained for each level. So, the unequal peak-to-valley current ratio (PVCR) will be observed in the coulomb oscillations, and therefore the operation of room-temperature of silicon SET-based PSFs is impossible.
Highlights
Attempt to integrate sub-10 nm scaled complementary metal– oxide–semiconductor (CMOS) devices will face physical limitations in the near future
The complementary structure with two single-electron transistor (SET) was first proposed by Tucker and is similar to a CMOS inverter circuit in structure [6]
We implement a simple periodic symmetric functions (PSFs) circuit based on a complementary SET inverter consisting of two SETs [18, 20]
Summary
Attempt to integrate sub-10 nm scaled complementary metal– oxide–semiconductor (CMOS) devices will face physical limitations in the near future. Reduction in the size of island below ∼2 nm can lead to a drastic improvement in the performance of a roomtemperature SET At this scale, the total island capacitance CΣ may be ∼0.5 aF or even smaller, with single-electron charging energies EC ≫ kBT ∼26 meV at room-temperature. The metallic islands of about 2 nm and quantum dots (QDs) of about 10 nm in size have an energy-levels spacing, ΔE, which is typically smaller than the charging energy This means that only a discrete electron charge reveals in the conductance as a result of the Coulomb repulsion of individual electrons (Ea = EC). SETs are typically analysed using Orthodox theory (the classical Coulomb blockade regime), where quantisation of energy levels in the island is entirely ignored.
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