Performance Analysis of Optical Arithmetic Circuit Using Artificial Neural Network

Abstract

AbstractModern communication technologies need huge operational speed. This will be achieved if a standard data service, i.e. electron, is substituted by photon for the devices which are mainly focused on switching and logic. Gates are the basic building blocks of any complex circuit. Different logic and arithmetic operations can be carried out using these. In high-speed communication networks, all-optical arithmetic and logic operations are highly anticipated. In this chapter, the author has designed a parallel model to perform addition of two binary digits based on terahertz optical asymetric demultiplexer (TOAD)/semiconductor optical amplifier (SOA)-assisted Sagnac gates. By using only two parallely operating TOADs-based switches, a half adder has been designed. An equivalent model of this circuit has also been designed using artificial neural networks (ANN). This circuit design has been verified by using ANN. This optical circuit not only increases the speed of operation but also produces the desired output in the optical domain. The most significant advantage of this parallel circuit is that no synchronization is required for the inputs. Details of the performance analysis of this circuit, using the ANN model, have been presented.KeywordsArtificial neural networksOptical logicSemiconductor optical amplifierTerahertz optical asymmetric demultiplexer