Abstract
Interprocessor communications as well as interconnection among processors is an important design factor in an electronic switching system with distributed control. This paper proposes a new scheme for a message transfer algorithm in interprocessor communications, called a gating scheme. A major difference from the usual clocked scheme is that a processor never requests message transfer to another processor until it has finished processing all tasks in that processor; in the clocked scheme a processor periodically sends requests to another processor. A queueing model is presented for the performance evaluation of the gating scheme. Various performance measures are derived using the theory of piecewise Markov process. The gating and clocked schemes are compared numerically.
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