Performance Analysis of Enhanced Adaptive Logic Module for High Performance FPGA Architecture

V.J.K Kishor Sonti,Y Varthamanan,D Sivaraman

doi:10.19026/rjaset.9.1397

Abstract

The Enhanced Adaptive Logic Module for High Performance Field Programmable Gate Array Architecture has been designed to increase the speed and reduces the device utilization of FPGA Architecture. The existing altera based adaptive logic module has eight input critical path look up tables. That means six inputs are given directly to the one Lookup table and two inputs are given to the other LUT by shorting any two from the first LUT of that six inputs. So that the delays has been increased. The proposed EALM has 8 fracturable direct input LUT, so eight input logic function can be implement by using this module with high speed than the altera based ALM. In this method only one LUT is used and it produces single output. Thus there is no need of carry logic, so that the area has been reduced and increases the speed. And FPGA architecture is formed by combining four adaptive logic modules using programmable interconnect array. Enhanced adaptive logic module is introduced in that architecture instead of adaptive logic module and the performance is analyzed. The adaptive logic modules and enhanced adaptive logic modules of field programmable gate array architecture has been designed and simulated by using Xilinx ISE 12.1.

Highlights

The Adaptive Logic Module (Jason and Qiang, 2011) is the basic building block of logic in the Field Programmable Gate Array architecture (Farooq et al, 2012)
I/O block feedbacks, this fast, low-skew PIA routes and enhanced adaptive logic modules are as shown and only those signal required implementing logic in each explained in the Fig. 9 and 10
The proposed enhanced adaptive logic module packs more logic function compared to the existing ALM

Summary

Introduction

The Adaptive Logic Module (Jason and Qiang, 2011) is the basic building block of logic in the Field Programmable Gate Array architecture (Farooq et al, 2012). The basic building block of the Altera FPGA architecture provides advanced features with efficient logic utilization. Each ALM contains a variety of lookup table based resources that can be divided between two adaptive LUTs. With up to eight inputs to the two ALUTs, one ALM can implement various combinations of two functions.

Results

Conclusion