Performance analysis of digital delay lock loops in the presence of Doppler shift

Abstract

This paper considers discrete time analyses of digital delay lock loops (DDLL), and presents the results of an investigation concerning the performance degradation due to Doppler. The performance measures evaluated include the steady-state timing error probability density function (PDF) and the mean time to lose lock. The linear approximations are also provided and compared to the numerical results and simulations. The delay lock loop is a well-known technique to track the pseudo-noise (PN) codes for spread spectrum systems. Under a severe Doppler environment, such as in the low Earth orbit (LEO) satellite communication, it will be difficult to track the PN code for the first-order loop. Since the digital systems are more compact, lower cost, and more stable than their analog counterparts, we focus our attention on the digital first and second order code tracking loops that suffer from severe Doppler.