Abstract

Elliptic Curve Digital Signature Algorithm (ECDSA) is an asymmetric algorithm used for expanded security with data integrity and authentication in the On-Board Units (OBU’s) of Intelligent Transport Systems (ITS). Field programmable gate array is an attractive platform for hardware implementation of cryptographic algorithms, providing better security and performance in response to need. Hence, the various performance parameters of ECDSA such as key size, Look up Table (LUTs) slices and key pair points on the elliptic curve are analyzed in FPGA. In this work, we have designed a 16-bit Elliptic curve cryptography digital signature algorithm. The Elliptic curve cryptography covers all relevant asymmetric cryptographic natives like digital signature and key exchange. ECC key generation, signature generation, and verification generation algorithms were executed for the 16-bit ECDSA in Verilog HDL and then simulated and synthesized using Xilinx-virtex7 and Vivado 2018.3-zed board. It was seen that the number of slices involved by the ECDSA 16-bit algorithm in Xilinx (virtex7) is lesser than the available number of slices.

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