Abstract
CNFET is an emerging device which facilitates continuing feature size scaling trend. This novel device is predicted to outperform existing planer devices in near future owing to its unique features like ballistic transport operation, excellent carrier mobility, high current carrying capability, high stability, one dimensional band structure. In this paper, the performance of CNFET based six transistor (6T) SRAM cell has been analyzed. The effects of variations in dielectric material, oxide thickness, metal gate and CNT work function, Fermi level and chiral vector on power delay product (PDP) and static noise margin (SNM) are comprehensively analyzed. It is observed that Hafnium Silicate (HfSiO4) as dielectric material at 1nm oxide thickness yields best results in terms of stability and energy efficiency. CNT work function of 4.65eV yields most optimum PDP value of 63.59 zepto Joule.
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