Performance Analysis of a Flexible, Optimized and Fully Configurable FPGA Architecture for Two-Channel Filter Banks

Abstract

This paper presents a fully configurable FPGA architecture for two-channel filter banks which enables rapid quantization error and hardware performance analysis. Lattice designs that eliminate the effects of quantization error do not necessarily exhibit linear phase and may result in excessive delay. This can make them ill-suited for applications such as digital audio. Thus, the effects of quantization on an optimized direct form FIR based filter bank are analyzed. This is accomplished by using a high-level, configurable architecture and parameter driven synthesis for varying coefficient and channel quantization, and filter types. Overall, the presented design targets high-speed optimization through a fully pipelined architecture that reduces complexity by uniquely multiplexing coefficients. This flexible architecture and its supporting tools have enabled rapid filter bank prototyping and analysis of the effects of quantization on performance that drastically reduces design time and cost for realization.