Abstract

This paper investigates the analysis of critical path delay in various infinite impulse response (IIR) digital filter structure implementations. The critical path delay increases with the order of filter increasing in all conventional structures. So, it is needed to reduce the critical path delay for the faster realization of a digital filter in real-time processing. This paper proposed the rules for taking efficient cutset to retime the higher-order IIR filter structure. By applying this proposed retiming/pipelining techniques to EEG preprocessing filter, the critical path delay is $$28\%$$ , $$23\%$$ and $$18\%$$ more reduced as compared to the traditional retiming in direct form, parallel and lattice-ladder structure, respectively. These newly retimed structures are simulated in MATLAB Simulink and converted to fixed-point arithmetic for the synthesis of structures on Virtex-5 implementation. The results in different structures show that the allpass-based IIR structures has the lowest critical path delay and lowest computational complexity as compared to the conventional structures. Also, the proposed retimed structure has a smaller slice-delay product and support the largest maximum sampling frequency but requires more slice lookup tables (LUTs) than a conventional structure.

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