Abstract
A novel pulse referenced error correction method for digital PWM switching power amplifiers is proposed called pulse edge delay error correction (PEDEC). The paper presents fundamental theory for the novel control method, modeling and systematic approaches to PEDEC based digital amplifier design. The investigations are supplemented with comprehensive, low level nonlinear PSPICE based system simulation that verify the system model and furthermore illustrates the correction capability towards every error source in a switching power stage. PEDEC is the first method ever to effectively eliminate the fundamental power stage linearity problems in digital PWM power amplifier (Power DACs). The control method is concluded to be a very interesting new approach, that dramatically eases the design of high quality digital audio power amplifiers (Power DACs), since the power stage design can be relaxed and no precision A/D conversion is needed in the control system.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
