Patterning of 25-nm-wide silicon webs with an aspect ratio of 13

Abstract

Some of the main problems associated with downscaling of devices are short channel effects and lithography limitations. The double gate concept is known to improve short channel behaviour of MOSFETs. One vertical double gate MOSFET concept requires for the active region silicon webs 300 nm in height and less than 20 nm in width. Subsequent processing means the webs should originally be 10 nm wider than this. Electron beam lithography and reactive ion etching were used to obtain these 25–30-nm-wide silicon webs. To define the structures, hydrogen silsesquioxane (HSQ) was used as electron beam resist; 23-nm-wide and 110-nm-high lines in HSQ were obtained. These structures were transferred by dry etching with a HBr/O 2 plasma and an inductive coupled plasma (ICP) source. This resulted in 25-nm-wide and 330-nm-high silicon webs.