Abstract
The sector of autonomous driving gains more and more importance for the car makers. A key enabler of such systems is the planning of the path the vehicle should take, but it can be very computationally burdensome finding a good one. Here, new architectures in Electronic Control Units (ECUs) are required, such as Graphics Processing Units (GPUs), because standard processors struggle to provide enough computing power. In this work, we present a novel parallelization of a path planning algorithm. We show how many paths can be reasonably planned under real-time requirements and how they can be rated. As an evaluation platform, an Nvidia Jetson board equipped with a Tegra K1 System-on-Chip (SoC) was used, whose GPU is also employed in the zFAS ECU of the AUDI AG.
Highlights
The configuration with the smallest number of paths the Central Processing Units (CPUs) is faster than the Graphics Processing Units (GPUs)
A path planning approach based on quintic polynomials was parallelized on an embedded GPU
It was shown that the proposed path planning algorithm and its single steps can be efficiently parallelized on a GPU
Summary
Fully responsible systems, so-called highly and fully automated systems, will be available for all driving-related tasks. These will reshape mobility completely, e.g., by enhancing safety and comfort or introducing new transportation concepts, such as robot taxis. For a dependable, highly and fully automated driving vehicle, a multitude of paths has to be considered and evaluated to ensure that the chosen way is safe, comfortable, and a dynamically possible path. Our approach targets highway scenarios and is for SAE Level 2 or above [1] At these levels, the system has the control of the vehicle in lateral and in longitudinal direction. We show how many paths can be planned reasonably under real-time requirements and where the sweet spot of the proposed algorithm on a GPU and CPU architecture is
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