Passive SC Sigma Delta Modulators Revisited: Analysis and Design Study

Abstract

In this paper we study passive switched-capacitor sigma-delta ( $\Sigma\Delta $ ) modulators suitable for low power applications. Using a one-bit quantizer as the only active block those modulators save power and achieve high linearity. However, their order is largely limited since the passive loop filter presents a significant attenuation to the signal. Typically with a second-order filter the modulator can achieve a satisfactory signal-to- quantization-noise ratio (SQNR) by using a large enough oversampling ratio (OSR) that also creates a tradeoff with the power consumption. A passive $\Sigma\Delta $ modulator when modeled as a linear system requires extraction of the equivalent loop gain. It is shown that for this purpose the quantization and thermal noise should be considered jointly. The paper presents optimization of the modulator in the design space defined by the filter capacitor ratios and the feedback coefficients. Both circuit and system level behavioral models are extensively exploited for this purpose. Provided is a detailed analysis of the thermal noise, quantization noise, and other parasitic effects. The design verified by 65 nm CMOS chip demonstrates very good agreement with the developed models. The measurements show signal-to-noise-and-distortion ratio (SNDR) of 73 dB and ${\hbox {power ~consumption}} with energy efficiency of 0.27 pJ/step at 0.9 V supply. For supply voltage reduced to 0.7 V the power consumption is 0.47 $\mu {\rm W}$ with ${\rm SNDR}= 71~{\rm dB}$ while energy efficiency is 0.16 pJ/step.