Abstract
A new method for quantisation error extraction in continuous-time delta–sigma modulators (CTDSMs) is proposed. The proposed method avoids the use of additional active components such as transconductors and opamps and uses only passive components. Instead, the virtual ground of the second stage integrator is used as a summing node and is utilised to extract the quantisation error. Thus, multi-stage CTDSM can be implemented in a power and area efficient way.
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