Passive microelectrode arrays for recording of neural signals: A simplified fabrication process

Abstract

A new process for the fabrication of microelectrode arrays is developed that is fully compatible with standard integrated circuit fabrication schedules. The process involves two innovations: the use of initially thin silicon substrates (50 μm), and the use of sputtered SiO2 as a plasma etching mask. The finished electrode array consists of a very thin silicon substrate (<20 μm) that provides a mechanically stable carrier for the electrodes. The electrode metal conductors are sandwiched between two layers of polyimide films that adhere firmly to the substrate. Small electrode interface and contact windows are made with lithographically limited minimum feature sizes. Dry plasma etching is employed both to open the windows and to thin the substrate. For the former, we have determined the appropriate etching conditions and thicknesses necessary for SiO2 to be a viable mask in this step. For the latter step, the electrode profile is first etched to the final desired substrate thickness from the front (with the same oxide as the mask), and the wafer is then turned over and fully etched until the electrodes separate. Using initially thin wafers simplifies considerably this final etch.