Passive and heterogeneous integration towards a Si-based System-in-Package concept

Abstract

Recently Philips launched their first highly integrated cellular RF-transceiver systems using a new Si-based System-in-Package (SiP) technology. This technology utilizes back-end processing to integrate passive components onto a Si-substrate that serves as a platform for heterogeneous integration with active dies, MEMS dies, etc. As an example, a transceiver IC is flip-chip mounted onto this passive component substrate, thus minimizing interconnect parasitics and footprint area. Next, this sub-assembly is flipped back into a standard single IC-sized lead frame package. This paper reports on such Si-based SiP transceiver modules and the underlying technologies. Here, the passive die is made by the so-called PICS ( Passive Integration Connecting Substrate) technology that integrates passive components on one die, such as high-Q inductors, resistors, accurate MIM capacitors and, in particular, high-density (∼ 20–30 nF/mm 2) MOS ‘trench’ capacitors for decoupling. These MOS capacitors integrated in RF power amplifiers showed superior signal stability compared to discrete ceramic capacitors. Ultralow-loss factors were measured: series inductance ESL < 40 pH and resistance ESR < 150 mΩ, combined with superior dielectric breakdown voltage (30 V), low leakage (< 1 nA/mm 2 at 22 V) and long lifetime of 10 years at 100 °C and 10 V).