Abstract
The computational complexity of fully adaptive arrays employing thousands of sensors is often prohibitive and, thus, one is led to processors which only use a fraction of the available adaptive degrees of freedom. We present an optimal approach to the design of a transformation that maps the fully adaptive space into a partially adaptive space based on minimization of output interference power. The design procedure allows for incorporation of a priori knowledge of interference characteristics, applies to arbitrary array geometries and interference scenarios, and results in unconstrained adaptive processor implementations. Examples are presented illustrating the effectiveness of the new partially adaptive processors against broad-band interference.
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