Abstract
Due to the requirement of reliability, the test for ESD ability is necessary for almost all the product of IC. But during the test of ESD zapping, the test pin may temporary storage ESD charges. These storage charges will temporary cause shifting of the I-V characteristic curve of the test pin. And, it will seriously influence the ESD test results. Eventually, it is found if the parasitic capacitance of the test pin is over 10pf, the ESD test results may be not correct. We find, by suitable adjust the delay time between the ESD zapping and the measurement of I-V characteristic curve, a more correct result can be obtained. Therefore, it can correct the mistake made by parasitic capacitance and have a reliable ESD test result.
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