Abstract

Accurate estimation of the parasitics in high-speed circuits is critical in optimizing circuit performance. A new method for parasitic characterization of highspeed circuits employing mixed-mode circuit and device simulation is proposed. The intrinsic characteristics are captured using a device simulator and the equivalent circuit for passive extrinsic elements are evaluated in a straight forward manner from impedance and admittance representation of measured S-parameters. This decoupling enables total performance optimization based on separate tuning of layout and the fabrication process recipe.

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