Parametric wafer map visualization

Abstract

The semiconductor industry widely exploits bin wafer maps and their spatial information for process monitoring and yield enhancement. However, the bin wafer maps' underlying parameters are even more sensitive and informative. In this article, I describe the design of an interactive wafer map visualization tool and its implementation using Tcl/Tk. More importantly, I demonstrate how one could use the resulting color wafer maps to uncover subtle manufacturing process patterns, variations and trends that are otherwise extremely difficult to detect and discover.